A recent innovation within the field of integrated circuit technology is the resistive random access memory (RRAM). Much of RRAM technology is still in the theoretical stage; various electric concepts for RRAM technology exist but the concepts are in one or more stages of verification to prove or disprove the theory. Even so, RRAM technology promises to hold substantial advantages for future growth in the semiconductor electronics industry.
According to various theoretical models, the RRAM can be configured to have multiple resistive states; for instance, the RRAM can be configured to have a relatively low resistance or a relatively high resistance. Moreover, the RRAM can generally be configured to enter one or another resistive state in response to an external condition imposed upon the RRAM. Thus, in transistor parlance, applying or removing the external condition can serve to program or de-program the RRAM. Moreover, depending on physical makeup and electrical arrangement, an RRAM can generally maintain a programmed or de-programmed state. Maintaining a state might require other conditions be met (e.g., existence of a minimum operating voltage, existence of a minimum operating temperature, . . . ), or no conditions be met, depending on a makeup of the RRAM. Generally speaking, the capacity to be in one of two states and maintain one or another of the states can serve to represent one binary bit of information. Thus, RRAM is theoretically usable as electronic memory in suitably arranged electronic circuits.
Different types of RRAM structure and physiology have been suggested, with various predicted results and operating characteristics. For example, some proposed RRAM are non-volatile memory within which a conductive filament (or many filaments) can be induced within an otherwise dielectric material. In a normal state, the dielectric has high resistance, and is non-conductive. However, application of a suitable voltage across the dielectric for example, can induce a conduction path therein. Various physical mechanisms enable generation of a conduction path in a dielectric, including defects in the material (whether natural or induced via doping), metal migration, and so on. Once the filament is formed within the dielectric, the RRAM is activated—resulting in a low resistance conduction path through the dielectric. Activation of the RRAM is established by applying a program voltage across the RRAM terminals. The RRAM cell is deactivated when the filament is retracted away from at least one of the RRAM terminals or forms a discontinuous gap within the filament. The Deactivated RRAM exhibits high resistance characteristics. RRAM deactivation is established by applying an erase voltage across the RRAM terminals. Thus, the formation and retraction of a conduction path can be referred to as a programmable conduction path, yielding similar electric characteristics as a conventional three-terminal transistor. In practice, however, the inventors of the present invention believe that the RRAM has not been commercially successful for reasons including incompatibility of RRAM fabrication materials with traditional CMOS processes, the incompatibility of RRAM processes as part of back end CMOS fabrication, and the like.
Additionally, some theoretical proposals for RRAM are expected to suffer from known drawbacks of conventional memory, such as metal oxide semiconductor (MOS) transistors, and the like. For instance, conventional NAND MOS transistors often exhibit relatively poor read performance compared with other transistor technologies, as well as relatively poor cell retention. Likewise, NOR MOS transistors have relatively large cell sizes, are less scalable than other technologies, and consume higher power. While it may be a panacea to suggest that all benefits of all transistor types can be incorporated into a single technology while avoiding all detriments, significant improvements are achieved at a relatively steady pace in MOS transistor technology, and RRAM may follow a similar technology curve.